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Visa resultatHär kan se resultatet från utvärderingen och exportera statistiken till ett annat program. Det går också att göra en enkel filtrering genom att klicka på svarsalternativen och kommentarerna eller en avancerad filtrering genom att använda knappen längst ned.
TKDAT 1213-3 Digitalteknik-syntes, EDA321|DIT795Status: AvslutadÖppen för svar: 2013-03-15 - 2013-04-12 Antal svar: 58 Procent av deltagarna som svarat: 39% Kontaktperson: Maria Sörner» Utbildningsprogram som genomför enkäten: Datateknik 300 hp
Opening questions1. Which university do you belong to?Some of our courses are taken jointly by students of the University of Gothenburg and Chalmers University of Technology. In order for us to be able to look at the answers of each student group separately, we would like you to indicate which university you are registered at.57 svarande
Genomsnitt: 1.94 2. Are you a second-year student at the CSE Bachelor programme?The Student Board of the Computer Science and Engineering (CSE) programme pays for a free afterschool meal, once per study period, for the class in the CSE programme with the highest percentage of responses to the evaluation questionaires. To make it easier for the Student Board to determine which class this is, please answer the question below.55 svarande
Genomsnitt: 1.47 Your own effort3. How many hours per week did you spend on this course?We mean total time, that is, it comprises the time you spent in class and the time you spent on your own work. Try to estimate the average time over the entire study period.58 svarande
Genomsnitt: 2.68 - I knew VHDL from a previous course, "Digital construction".» (At most 15 hours/week) 4. How large part of the teaching offered did you attend?57 svarande
Genomsnitt: 4.19 - I only attended the labs.» (0%) Goals and goal fulfilmentThe course syllabus states the course goals in terms of learning outcomes, i.e., knowledge, skills and attitudes to be acquired by the student during the course.To review the learning outcomes for this course, click here. (Opens in new window) 5. How understandable are the course goals?57 svarande
Genomsnitt: 2.5 6. Are the goals reasonable considering your background and the number of credits?Answer this this question and the succeeding one, only if you do know the course goals.57 svarande
Genomsnitt: 2.07 - Felt like i lacked som pre-knowledge as electro-student. But i read digodat over 5 Years ago. I think the course was a bit hard even if I take that into acount.» (No, the goals are set too high) 7. Did the examination assess whether you have reached the goals?57 svarande
Genomsnitt: 2.77 - We have learnt vhdl in the whole course but nothing with vhdl was in the examination.» (To some extent) Teaching and course administration8. To what extent has the teaching been of help for your learning?57 svarande
Genomsnitt: 2.63 - Barely any at all. The lectures were mostly confusing, and when it came to the lab part, the assistants were not very helpful at all.
Some exercise moments (and exercises!) would really have helped.» (Small extent) 9. To what extent has the course literature and other material been of help for your learning?57 svarande
Genomsnitt: 1.91 - Mostly used google to find articles online..» (Small extent) 10. How well did the course administration, web page, handouts etc work?57 svarande
Genomsnitt: 3.07 - All the lap pms came out too late to give us a chance to prepare properly, and when they came it was hardly clear what we were supposed to done at home as preparation.
The processor specefication, lab pms and everything else weere frequently updated so it was hard to know if you were actually looking at the latest version.» (Very badly) Study climate11. How were the opportunities for asking questions and getting help?57 svarande
Genomsnitt: 3.22 - Very, very poor. No exercise moments at all, the only available help was for the lab parts and only during the labs themselves (which led to people attending multiple labs per week). And even that help did not give very much.» (Very poor) 12. How well has cooperation between you and your fellow students worked?57 svarande
Genomsnitt: 3.68 - My lab partner jumped the course a bit in. It was then too much work to match me up with another as everyone were on different labs.» (Rather poorly) 13. How was the course workload?57 svarande
Genomsnitt: 3.56 - I know many others who have spent 25-30 hours on just one of the labs, so I think I and my partner were lucky to be able to finish them faster. » (Adequate) 14. How was the total workload this study period?57 svarande
Genomsnitt: 3.63 - The other course I took at the same time was easier. » (Adequate) Summarizing questions15. What is your general impression of the course?57 svarande
Genomsnitt: 3.59 (bidrar till totalt genomsnitt/jämförelseindex) - Worst course I"ve had n Chalmers to date.» (Poor) 16. What should definitely be preserved to next year?- The labs.»- The labs were interesting, and Iannis is a good teacher. I also like the concept with two optional labs, they were good and as an extra bonus they gave 10 extra points to the exam.» - Making a CPU» - i loved the laborations, and i really dont think they were that hard to get done in the time given» - visiting clean room» - The layout of the course. That the labs cover vhdl and the exam the rest.» - The wish to improve the course and to take students" opinions into account. » - Lab goals, it"s very interesting to have a full project to work on, designing different parts of the ChAcc processor was very interesting.» - Nothing» - The teacher, the labs.» - Räkneuppgifter på tentan.» - The way this course separated the lab part (VHDL) and the more theoretical part for the exam.» - Ioannis was very good as a lecturer. I especially liked how he always asked "Do you want me to go trough it again?" and then he went trough it again, helped a lot. Many teachers just keep going.» - The labs! » - the labs» - The labs! Excellent to build something that actually works! Because the labs were new to this year, there are some things that could be improved to next year. Some things were unclear in the lab-PM. For example the seventh lab, where you should use another top-model. The PM didn"t say anything about that. And The power-consumption should be looked up in each step rather than last in the lab, when you need to go back and do settings for speed and area again. The lab report was a bit too large, and it should be more clear that you need to look through these questions when you are in the lab. For example, if you read the lab 7 instructions for the report, you find out that you need to check some things in the lab again...» - Christian Isaksson! He did a very god job as an lab-assistants. Extremely god at explanation and very friendly. » - Yannis!» - The introduction lab. I have taken this course before but the vhdl assignments were really hard to just jump into as we were expected to do, and I gave up on the course pretty early. The introduction lab was extremely helpful in introducing the leb environment and the language.» - The good comunication.» - The labs were great, if you spend just a little more time on the lab notes they will be even better. I"d like to see more information about the optimization parameters in the software and an explanation about area. What is a slice etc. Thanks!» - The labs. But, point out that there are considerable work to prepare for those. It was quite at shock the first time.» - Sven» - The laboration. » - the labs, » - The laborations» - The laborations» - The same kind of enthusiasm to teach from the lecturer, which made lectures a whole lot more fun to attend overall.» - The labs, very fun and motivational.» 17. What should definitely be changed to next year?- We need either an extra supervisor in the labs or preparation slots with a supervisor (like in the fundamental course Dig o Dat), otherwise it"s almost impossible to manage to get the labs done in time.»- Do as you did this year. The labpm could been clearer» - maybe a slightly shorter exam, i barly had time to answer all of the questions» - the labs are too difficult. lab pm should be easier to understand. too many lecture slides.» - Either the labs need to be reworked, or there needs to be more help with preparation. Or there could be other exercises to do as preparation before the labs. The one exercise demonstration session that we had was extremely poorly prepared. It did not cover minimization of functions of 5 or 6 variables. Many mistakes were made during the demonstration. 40 minutes or so was spent on discussing Karnaugh diagrams of 4 variables, which we already know from a previous course. Testing was not covered at all, since it was "too messy and error-prone to do it on the black board". » - Maybe more lab attendants» - The labs (they take way too much time, especially when they won"t help you on the final exam. A few bonus points if you make the optional labs are not enough!), lectures (with hundreds of slides in no particular order at all..) and the total absence of exercises.» - More TAs on the labs, more lab times maybe?» - Handledarna, förrutom Christian. Han skall ni ha kvar.» - We are used to have the lab part of the course being a large part of the exam part as well. I believe separating these in this course was good. But we were informed that VHDL was not going to be a part of the exam in week 5 which is to late. Better be clear about that from week 1. The lab chain was good and educational but it would be good if what the lab-pms and the writing guide lines for the lab report told us to document the same things. We had to redo some simulations at a later time due to the writing guide lines being more extensive on the documentation part of the labs than what was informed in the pms.» - The use of a switch as master_load_enable. Maybe the use of a button without contact bounces would be better.» - it could be good with a few exercise sessions, maybe once a week or once every second week.» - Less slides. And more material from the book. And one exercise each week.» - Have a talk with Sven Knutsson, very very poor help during the labs. We asked many times the same questions and got confusing answerers. When we asked the same question the other lab-assistants we got a clearly answer and could continue with the lab. He also was very rude at some points during the labs. Instead of trying to help us we wanted to be "effective" by giving a "one-line" answer and then just go away again...» - Remove Sven and make sure that the labs are done before the course started!» - Lighter workload in the labs.» - The fourth lab (controller implementation with FSM) was a lot harder than the rest of the labs. My group spent more time on that than the rest of the labs combined (by a large margin). I would prefer that it would be split in two labs. The fifth lab (testbench) could be skipped all together because I didn"t feel that building a testbench was rewarding as the biggest problem was reading from a file and that didn"t seem relevant to the course.» - Sometimes the lab-PM were har to understand, it would be good to make them clearer for next year, epsecially lab 2 and 3.» - Angelos was a great lab attendant, one of the better i"ve come across. Paying that blonde swedish guy is a waste of money, he has some serious attitude problems.» - Exercises should be introduced. It is a good way to study for the exam! » - I would have liked if there had been scheduled exercises of the same sort that was on the exam. The exercises covered during the lectures could have been covered there instead.» - It was not alot of information about the lab-report that we had to hand in, so maybe some more information about that.» - No labreport. the exam discuss the content of the labs. » - There should be fewer labs to complete and some exercise sessions instead.» - firday afternoon lectures» - Better forsight in preparing the lab-assistants for the laborations» - Labs earlier handed out, theese should also be more clearly "defined". » - The lab pms. They were very unclear on what to actually do in some assignments, and in some cases contained factual errors. The processor specifications was what one had to use mostly to figure out what should be done, and it might have helped if the lab pms pointed to appropriate pages for certain things, such as when creating the FSM, would tell us we had tables for the opcodes behavior.» - Nothing.» - I would"ve preferred if we followed a course book more clearly instead of the slides to such large extent. I also think that the course covers a bit too much material briefly. I"d prefer if some parts were skipped in favor of some deeper knowledge about some of the more important parts. Also, VHDL exercises would"ve been appreciated - at least in the beginning.» - Much better written lab PMs.» - The teahers that are in charge of the course should really take help from more experienced teachers at the school to get the course layout right. I can"t say anything good about this course. Laborations were way too time-consuming and there are way better approaches to benifit the learning of the course material. The communication teacher-students was non-existent through the whole course. The list goes on and on... But I think that the worst part was when the examinator of the course branded almost every student that took the course as idiots in LV2 because almost nobody were able to finnish the laboration we were supposed to do that week.» - Integrate the lab report guidelines into the individual lab PMs» - Tell from the start that VHDL is not going to be on the exam. Based on the content of the first lectures, we thought VHDL would be the important thing on the exam and didn"t focus as much on the other parts, those that were actually in the exam!» 18. Additional comments- I would be nice knowing what would be tested on the exam earlier, but I know it won"t happen next year as the course is "new".»- Keep up the good work Iannis, you"re a great teacher that listens to our opinions.» - The help during the labs was often quite bad. Sven often just looked at our code for 30 seconds, then just left, before we could say "we have already tried that" or needing further help. The vast majority of the time we ended up getting no help at all and just went back into the queue. Christian and Angelo was a lot better.» - It would be great to have access to the assembler, so that we can write our own programs.» - The labs can become more clearly, the pdf were hard to understand. At some points most of the lab-time went to understand the LAB-PM not the Lab-task.» - Great course. The labs were more rewarding and easier to grasp than last time I tried taking the course.» - I enjoyed Ioannis way of teaching a lot. He seemed to care about the course and he did seem to put a lot of effort into it.» - Nice course on the whole! Let"s see how the results turn out ,)» - I really liked the course :-)» - The lab assignment was made ,,as if we already had some good knowledge in VHDL. No exercise to do from what you have learned from the lectures which make hard to learn just from studying more then 1000 slides.» - :)» - None» Genomsnitt totalt för detta stycke: 3.59 Beräknat jämförelseindex: 0.64
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